Performance Evaluation of Shor Algorithm on Simulated Quantum Hardware with Circuit Level Analysis
Thamaraimanalan T. Haldorai A. Ramu A. Mariyappan K.
July 2025AnaPub Publications
Journal of Machine and Computing
2025#5Issue 31944 - 1957 pp.
Shor’s algorithm stands as a breakthrough in quantum computing due to its potential to factor large integers exponentially quicker than classical algorithms. However, implementing and evaluating this algorithm on real quantum computer hardware remains exciting due to qubit limitations, gate noise, and hardware constraints. This research presents a comprehensive performance evaluation of Shor’s algorithm using simulated quantum backends provided by Qiskit. A flexible and generic implementation is proposed, allowing dynamic input of integers to be factored, with randomized coprime selection and automated circuit generation. The algorithm is tested on various semiprime numbers, such as 15, 21, and 35, using IBM’s Aer simulator. A major contribution of this work is the circuit-level analysis conducted both before and after transpilation. Metrics such as gate counts, circuit depth, and simulator runtime are extracted to assess scalability and resource requirements. High-resolution plots of the pre-transpiled circuits are saved to visualize algorithmic complexity, while post-transpilation metrics inform future quantum hardware feasibility. The output measurement distributions are analyzed to estimate periodicity and derive correct factors. The proposed implementation is compared with existing fixed-instance Shor demonstrations to highlight its flexibility and extensibility. Experimental results show consistent success in factor retrieval and provide valuable insight into circuit growth and complexity under realistic constraints. This analysis lays the groundwork for future adaptation to NISQ hardware and contributes to understanding Shor’s algorithm from both computational and architectural perspectives.
Qiskit Simulation , Quantum Circuit Analysis , Quantum-Classical Comparison , Shor’s Algorithm
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Department of Electronics and Communications Engineering, Sri Eshwar College of Engineering, Tamil Nadu, Coimbatore, India
Department of Computer Science and Engineering, Sri Eshwar College of Engineering, Tamil Nadu, Coimbatore, India
Department of Computational Science and Software Engineering, K. Zhubanov University, Asia, Kazakhstan
Department of Computer Science and Engineering, Chennai Institute of Technology, Tamil Nadu, Chennai, India
Department of Electronics and Communications Engineering
Department of Computer Science and Engineering
Department of Computational Science and Software Engineering
Department of Computer Science and Engineering
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